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<h1>Timer Counter Channel Interface Peripheral</h1>
<null><a name="TC0"></a><b>TC0</b> <i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91S_TC">AT91S_TC</a>)</font></i><b>  0xFFFA0000 </b><i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91C_BASE_TC0">AT91C_BASE_TC0</a>)</font></i>
<table border=1 cellpadding=3 cellspacing=0><null><th bgcolor="#FFFFCC"><font size="-1">Periph ID <a href="#AIC">AIC</a></font></th><th bgcolor="#FFFFCC"><font size="-1">Symbol</font></th><th bgcolor="#FFFFCC"><font size="-1">Description</font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b>12</b> </font></td><td><font size="-1"><i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91C_ID_TC0">AT91C_ID_TC0</a>)</font></i></font></td><td><font size="-1">Timer Counter 0</font></td></tr>
</null></table><br><table border=1 cellpadding=3 cellspacing=0><null><th bgcolor="#FFFFCC"><font size="-1"><b>Signal</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Symbol</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>PIO controller</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b>
</font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b>TIOA0</b></font></td><td><font size="-1"><i><font size="-1">(<a href="#AT91C_PA0_TIOA0   ">AT91C_PA0_TIOA0   </a>)</font></i></font></td><td><font size="-1"><a href="#PIOA">PIOA</a>  Periph: B Bit: 0</font></td><td><font size="-1">Timer Counter 0 Multipurpose Timer I/O Pin A</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b>TIOB0</b></font></td><td><font size="-1"><i><font size="-1">(<a href="#AT91C_PA1_TIOB0   ">AT91C_PA1_TIOB0   </a>)</font></i></font></td><td><font size="-1"><a href="#PIOA">PIOA</a>  Periph: B Bit: 1</font></td><td><font size="-1">Timer Counter 0 Multipurpose Timer I/O Pin B</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b>TCLK0</b></font></td><td><font size="-1"><i><font size="-1">(<a href="#AT91C_PA4_TCLK0   ">AT91C_PA4_TCLK0   </a>)</font></i></font></td><td><font size="-1"><a href="#PIOA">PIOA</a>  Periph: B Bit: 4</font></td><td><font size="-1">Timer Counter 0 external clock input</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC0_CfgPIO">AT91F_TC0_CfgPIO</a></b></font></td><td><font size="-1">Configure PIO controllers to drive TC0 signals</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC0_CfgPMC">AT91F_TC0_CfgPMC</a></b></font></td><td><font size="-1">Enable Peripheral clock in PMC for TC0</font></td></tr>
</null></table><br><br><a name="TC1"></a><b>TC1</b> <i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91S_TC">AT91S_TC</a>)</font></i><b>  0xFFFA0040 </b><i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91C_BASE_TC1">AT91C_BASE_TC1</a>)</font></i>
<table border=1 cellpadding=3 cellspacing=0><null><th bgcolor="#FFFFCC"><font size="-1">Periph ID <a href="#AIC">AIC</a></font></th><th bgcolor="#FFFFCC"><font size="-1">Symbol</font></th><th bgcolor="#FFFFCC"><font size="-1">Description</font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b>13</b> </font></td><td><font size="-1"><i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91C_ID_TC1">AT91C_ID_TC1</a>)</font></i></font></td><td><font size="-1">Timer Counter 1</font></td></tr>
</null></table><br><table border=1 cellpadding=3 cellspacing=0><null><th bgcolor="#FFFFCC"><font size="-1"><b>Signal</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Symbol</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>PIO controller</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b>
</font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b>TIOA1</b></font></td><td><font size="-1"><i><font size="-1">(<a href="#AT91C_PA15_TIOA1   ">AT91C_PA15_TIOA1   </a>)</font></i></font></td><td><font size="-1"><a href="#PIOA">PIOA</a>  Periph: B Bit: 15</font></td><td><font size="-1">Timer Counter 1 Multipurpose Timer I/O Pin A</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b>TIOB1</b></font></td><td><font size="-1"><i><font size="-1">(<a href="#AT91C_PA16_TIOB1   ">AT91C_PA16_TIOB1   </a>)</font></i></font></td><td><font size="-1"><a href="#PIOA">PIOA</a>  Periph: B Bit: 16</font></td><td><font size="-1">Timer Counter 1 Multipurpose Timer I/O Pin B</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b>TCLK1</b></font></td><td><font size="-1"><i><font size="-1">(<a href="#AT91C_PA28_TCLK1   ">AT91C_PA28_TCLK1   </a>)</font></i></font></td><td><font size="-1"><a href="#PIOA">PIOA</a>  Periph: B Bit: 28</font></td><td><font size="-1">Timer Counter 1 external clock input</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC1_CfgPIO">AT91F_TC1_CfgPIO</a></b></font></td><td><font size="-1">Configure PIO controllers to drive TC1 signals</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC1_CfgPMC">AT91F_TC1_CfgPMC</a></b></font></td><td><font size="-1">Enable Peripheral clock in PMC for TC1</font></td></tr>
</null></table><br><br><a name="TC2"></a><b>TC2</b> <i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91S_TC">AT91S_TC</a>)</font></i><b>  0xFFFA0080 </b><i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91C_BASE_TC2">AT91C_BASE_TC2</a>)</font></i>
<table border=1 cellpadding=3 cellspacing=0><null><th bgcolor="#FFFFCC"><font size="-1">Periph ID <a href="#AIC">AIC</a></font></th><th bgcolor="#FFFFCC"><font size="-1">Symbol</font></th><th bgcolor="#FFFFCC"><font size="-1">Description</font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b>14</b> </font></td><td><font size="-1"><i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91C_ID_TC2">AT91C_ID_TC2</a>)</font></i></font></td><td><font size="-1">Timer Counter 2</font></td></tr>
</null></table><br><table border=1 cellpadding=3 cellspacing=0><null><th bgcolor="#FFFFCC"><font size="-1"><b>Signal</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Symbol</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>PIO controller</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b>
</font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b>TIOA2</b></font></td><td><font size="-1"><i><font size="-1">(<a href="#AT91C_PA26_TIOA2   ">AT91C_PA26_TIOA2   </a>)</font></i></font></td><td><font size="-1"><a href="#PIOA">PIOA</a>  Periph: B Bit: 26</font></td><td><font size="-1">Timer Counter 2 Multipurpose Timer I/O Pin A</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b>TIOB2</b></font></td><td><font size="-1"><i><font size="-1">(<a href="#AT91C_PA27_TIOB2   ">AT91C_PA27_TIOB2   </a>)</font></i></font></td><td><font size="-1"><a href="#PIOA">PIOA</a>  Periph: B Bit: 27</font></td><td><font size="-1">Timer Counter 2 Multipurpose Timer I/O Pin B</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b>TCLK2</b></font></td><td><font size="-1"><i><font size="-1">(<a href="#AT91C_PA29_TCLK2   ">AT91C_PA29_TCLK2   </a>)</font></i></font></td><td><font size="-1"><a href="#PIOA">PIOA</a>  Periph: B Bit: 29</font></td><td><font size="-1">Timer Counter 2 external clock input</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC2_CfgPIO">AT91F_TC2_CfgPIO</a></b></font></td><td><font size="-1">Configure PIO controllers to drive TC2 signals</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC2_CfgPMC">AT91F_TC2_CfgPMC</a></b></font></td><td><font size="-1">Enable Peripheral clock in PMC for TC2</font></td></tr>
</null></table><br><br></null><a name="TC"></a><h2>TC Software API <i><font size="-1">(<a href="AT91SAM7S256_h.html#AT91S_TC">AT91S_TC</a>)</font></i></h2>
<a name="TC"></a><null><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Offset</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Field</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x0</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_CCR">TC_CCR</a></font></td><td><font size="-1">Channel Control Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x4</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_CMR">TC_CMR</a></font></td><td><font size="-1">Channel Mode Register (Capture Mode / Waveform Mode)</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x10</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_CV">TC_CV</a></font></td><td><font size="-1">Counter Value</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x14</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_RA">TC_RA</a></font></td><td><font size="-1">Register A</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x18</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_RB">TC_RB</a></font></td><td><font size="-1">Register B</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x1C</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_RC">TC_RC</a></font></td><td><font size="-1">Register C</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x20</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_SR">TC_SR</a></font></td><td><font size="-1">Status Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x24</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_IER">TC_IER</a></font></td><td><font size="-1">Interrupt Enable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x28</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_IDR">TC_IDR</a></font></td><td><font size="-1">Interrupt Disable Register</font></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x2C</b></font></td><td><font size="-1"><a href="AT91SAM7S256_TC.html#TC_IMR">TC_IMR</a></font></td><td><font size="-1">Interrupt Mask Register</font></td></tr>
</null></table><br><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Function</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th><tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC_GetInterruptMaskStatus">AT91F_TC_GetInterruptMaskStatus</a></b></font></td><td><font size="-1">Return TC Interrupt Mask Status</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC_IsInterruptMasked">AT91F_TC_IsInterruptMasked</a></b></font></td><td><font size="-1">Test if TC Interrupt is Masked </font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC_InterruptDisable">AT91F_TC_InterruptDisable</a></b></font></td><td><font size="-1">Disable TC Interrupt</font></td></tr>
<tr><td bgcolor="#FFFFCC"><font size="-1"><b><a href="lib_AT91SAM7S256_h.html#AT91F_TC_InterruptEnable">AT91F_TC_InterruptEnable</a></b></font></td><td><font size="-1">Enable TC Interrupt</font></td></tr>
</null></table></null><h2>TC Register Description</h2>
<null><a name="TC_CCR"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_CCR  <i>Channel Control Register</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_CCR">AT91C_TC0_CCR</a></i> 0xFFFA0000</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_CCR">AT91C_TC1_CCR</a></i> 0xFFFA0040</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_CCR">AT91C_TC2_CCR</a></i> 0xFFFA0080</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="TC_CLKEN"></a><b>TC_CLKEN</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKEN">AT91C_TC_CLKEN</a></font></td><td><b>Counter Clock Enable Command</b><br>0 = No effect.<br>1 = Enables the clock if CLKDIS is not 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="TC_CLKDIS"></a><b>TC_CLKDIS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKDIS">AT91C_TC_CLKDIS</a></font></td><td><b>Counter Clock Disable Command</b><br>0 = No effect.<br>1 = Disables the clock.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="TC_SWTRG"></a><b>TC_SWTRG</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_SWTRG">AT91C_TC_SWTRG</a></font></td><td><b>Software Trigger Command</b><br>0 = No effect.<br>1 = A software trigger is performed: the counter is reset and clock is started.</td></tr>
</null></table>
<a name="TC_CMR"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_CMR  <i>Channel Mode Register (Capture Mode / Waveform Mode)</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_CMR">AT91C_TC0_CMR</a></i> 0xFFFA0004</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_CMR">AT91C_TC1_CMR</a></i> 0xFFFA0044</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_CMR">AT91C_TC2_CMR</a></i> 0xFFFA0084</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">2..0</td><td align="CENTER"><a name="TC_CLKS"></a><b>TC_CLKS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS">AT91C_TC_CLKS</a></font></td><td><b>Clock Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV1_CLOCK"></a><b>TC_CLKS_TIMER_DIV1_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV1_CLOCK">AT91C_TC_CLKS_TIMER_DIV1_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV1_CLOCK</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV2_CLOCK"></a><b>TC_CLKS_TIMER_DIV2_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV2_CLOCK">AT91C_TC_CLKS_TIMER_DIV2_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV2_CLOCK</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV3_CLOCK"></a><b>TC_CLKS_TIMER_DIV3_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV3_CLOCK">AT91C_TC_CLKS_TIMER_DIV3_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV3_CLOCK</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV4_CLOCK"></a><b>TC_CLKS_TIMER_DIV4_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV4_CLOCK">AT91C_TC_CLKS_TIMER_DIV4_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV4_CLOCK</td></tr>
<tr><td align="CENTER">4</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV5_CLOCK"></a><b>TC_CLKS_TIMER_DIV5_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV5_CLOCK">AT91C_TC_CLKS_TIMER_DIV5_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV5_CLOCK</td></tr>
<tr><td align="CENTER">5</td><td align="CENTER"><a name="TC_CLKS_XC0"></a><b>TC_CLKS_XC0</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_XC0">AT91C_TC_CLKS_XC0</a></font></td><td><br>Clock selected: XC0</td></tr>
<tr><td align="CENTER">6</td><td align="CENTER"><a name="TC_CLKS_XC1"></a><b>TC_CLKS_XC1</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_XC1">AT91C_TC_CLKS_XC1</a></font></td><td><br>Clock selected: XC1</td></tr>
<tr><td align="CENTER">7</td><td align="CENTER"><a name="TC_CLKS_XC2"></a><b>TC_CLKS_XC2</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_XC2">AT91C_TC_CLKS_XC2</a></font></td><td><br>Clock selected: XC2</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3a</td><td align="CENTER"><a name="TC_CLKI"></a><b>TC_CLKI</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKI">AT91C_TC_CLKI</a></font></td><td><b>Clock Invert</b><br>0 = Counter is incremented on rising edge of the clock.<br>1 = Counter is incremented on falling edge of the clock.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5..4</td><td align="CENTER"><a name="TC_BURST"></a><b>TC_BURST</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST">AT91C_TC_BURST</a></font></td><td><b>Burst Signal Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_BURST_NONE"></a><b>TC_BURST_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST_NONE">AT91C_TC_BURST_NONE</a></font></td><td><br>The clock is not gated by an external signal</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_BURST_XC0"></a><b>TC_BURST_XC0</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST_XC0">AT91C_TC_BURST_XC0</a></font></td><td><br>XC0 is ANDed with the selected clock</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_BURST_XC1"></a><b>TC_BURST_XC1</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST_XC1">AT91C_TC_BURST_XC1</a></font></td><td><br>XC1 is ANDed with the selected clock</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_BURST_XC2"></a><b>TC_BURST_XC2</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST_XC2">AT91C_TC_BURST_XC2</a></font></td><td><br>XC2 is ANDed with the selected clock</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6a</td><td align="CENTER"><a name="TC_LDBSTOP"></a><b>TC_LDBSTOP</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDBSTOP">AT91C_TC_LDBSTOP</a></font></td><td><b>Counter Clock Stopped with RB Loading</b><br>0 = Counter clock is not stopped when RB loading occurs.<br>1 = Counter clock is stopped when RB loading occurs.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7a</td><td align="CENTER"><a name="TC_LDBDIS"></a><b>TC_LDBDIS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDBDIS">AT91C_TC_LDBDIS</a></font></td><td><b>Counter Clock Disabled with RB Loading</b><br>0 = Counter clock is not disabled when RB loading occurs.<br>1 = Counter clock is disabled when RB loading occurs.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">9..8</td><td align="CENTER"><a name="TC_ETRGEDG"></a><b>TC_ETRGEDG</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ETRGEDG">AT91C_TC_ETRGEDG</a></font></td><td><b>External Trigger Edge Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_ETRGEDG_NONE"></a><b>TC_ETRGEDG_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ETRGEDG_NONE">AT91C_TC_ETRGEDG_NONE</a></font></td><td><br>Edge: None</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_ETRGEDG_RISING"></a><b>TC_ETRGEDG_RISING</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ETRGEDG_RISING">AT91C_TC_ETRGEDG_RISING</a></font></td><td><br>Edge: rising edge</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_ETRGEDG_FALLING"></a><b>TC_ETRGEDG_FALLING</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ETRGEDG_FALLING">AT91C_TC_ETRGEDG_FALLING</a></font></td><td><br>Edge: falling edge</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_ETRGEDG_BOTH"></a><b>TC_ETRGEDG_BOTH</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ETRGEDG_BOTH">AT91C_TC_ETRGEDG_BOTH</a></font></td><td><br>Edge: each edge</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">10a</td><td align="CENTER"><a name="TC_ABETRG"></a><b>TC_ABETRG</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ABETRG">AT91C_TC_ABETRG</a></font></td><td><b>TIOA or TIOB External Trigger Selection</b><br>0 = TIOB is used as an external trigger.<br>1 = TIOA is used as an external trigger.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">14a</td><td align="CENTER"><a name="TC_CPCTRG"></a><b>TC_CPCTRG</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPCTRG">AT91C_TC_CPCTRG</a></font></td><td><b>RC Compare Trigger Enable</b><br>0 = RC Compare has no effect on the counter and its clock.<br>1 = RC Compare resets the counter and starts the counter clock.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">15a</td><td align="CENTER"><a name="TC_WAVE"></a><b>TC_WAVE</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_WAVE">AT91C_TC_WAVE</a></font></td><td><b></b><br>0 = Capture Mode is enabled.<br>1 = Capture Mode is disabled (Waveform Mode is enabled).<br>0 = Waveform Mode is disabled (Capture Mode is enabled).<br>1 = Waveform Mode is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17..16</td><td align="CENTER"><a name="TC_LDRA"></a><b>TC_LDRA</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRA">AT91C_TC_LDRA</a></font></td><td><b>RA Loading Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_LDRA_NONE"></a><b>TC_LDRA_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRA_NONE">AT91C_TC_LDRA_NONE</a></font></td><td><br>Edge: None</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_LDRA_RISING"></a><b>TC_LDRA_RISING</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRA_RISING">AT91C_TC_LDRA_RISING</a></font></td><td><br>Edge: rising edge of TIOA</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_LDRA_FALLING"></a><b>TC_LDRA_FALLING</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRA_FALLING">AT91C_TC_LDRA_FALLING</a></font></td><td><br>Edge: falling edge of TIOA</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_LDRA_BOTH"></a><b>TC_LDRA_BOTH</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRA_BOTH">AT91C_TC_LDRA_BOTH</a></font></td><td><br>Edge: each edge of TIOA</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">19..18</td><td align="CENTER"><a name="TC_LDRB"></a><b>TC_LDRB</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRB">AT91C_TC_LDRB</a></font></td><td><b>RB Loading Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_LDRB_NONE"></a><b>TC_LDRB_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRB_NONE">AT91C_TC_LDRB_NONE</a></font></td><td><br>Edge: None</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_LDRB_RISING"></a><b>TC_LDRB_RISING</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRB_RISING">AT91C_TC_LDRB_RISING</a></font></td><td><br>Edge: rising edge of TIOA</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_LDRB_FALLING"></a><b>TC_LDRB_FALLING</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRB_FALLING">AT91C_TC_LDRB_FALLING</a></font></td><td><br>Edge: falling edge of TIOA</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_LDRB_BOTH"></a><b>TC_LDRB_BOTH</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRB_BOTH">AT91C_TC_LDRB_BOTH</a></font></td><td><br>Edge: each edge of TIOA</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2..0</td><td align="CENTER"><a name="TC_CLKS"></a><b>TC_CLKS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS">AT91C_TC_CLKS</a></font></td><td><b>Clock Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV1_CLOCK"></a><b>TC_CLKS_TIMER_DIV1_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV1_CLOCK">AT91C_TC_CLKS_TIMER_DIV1_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV1_CLOCK</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV2_CLOCK"></a><b>TC_CLKS_TIMER_DIV2_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV2_CLOCK">AT91C_TC_CLKS_TIMER_DIV2_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV2_CLOCK</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV3_CLOCK"></a><b>TC_CLKS_TIMER_DIV3_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV3_CLOCK">AT91C_TC_CLKS_TIMER_DIV3_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV3_CLOCK</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV4_CLOCK"></a><b>TC_CLKS_TIMER_DIV4_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV4_CLOCK">AT91C_TC_CLKS_TIMER_DIV4_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV4_CLOCK</td></tr>
<tr><td align="CENTER">4</td><td align="CENTER"><a name="TC_CLKS_TIMER_DIV5_CLOCK"></a><b>TC_CLKS_TIMER_DIV5_CLOCK</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_TIMER_DIV5_CLOCK">AT91C_TC_CLKS_TIMER_DIV5_CLOCK</a></font></td><td><br>Clock selected: TIMER_DIV5_CLOCK</td></tr>
<tr><td align="CENTER">5</td><td align="CENTER"><a name="TC_CLKS_XC0"></a><b>TC_CLKS_XC0</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_XC0">AT91C_TC_CLKS_XC0</a></font></td><td><br>Clock selected: XC0</td></tr>
<tr><td align="CENTER">6</td><td align="CENTER"><a name="TC_CLKS_XC1"></a><b>TC_CLKS_XC1</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_XC1">AT91C_TC_CLKS_XC1</a></font></td><td><br>Clock selected: XC1</td></tr>
<tr><td align="CENTER">7</td><td align="CENTER"><a name="TC_CLKS_XC2"></a><b>TC_CLKS_XC2</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKS_XC2">AT91C_TC_CLKS_XC2</a></font></td><td><br>Clock selected: XC2</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3b</td><td align="CENTER"><a name="TC_CLKI"></a><b>TC_CLKI</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKI">AT91C_TC_CLKI</a></font></td><td><b>Clock Invert</b><br>0 = Counter is incremented on rising edge of the clock.<br>1 = Counter is incremented on falling edge of the clock.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5..4</td><td align="CENTER"><a name="TC_BURST"></a><b>TC_BURST</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST">AT91C_TC_BURST</a></font></td><td><b>Burst Signal Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_BURST_NONE"></a><b>TC_BURST_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST_NONE">AT91C_TC_BURST_NONE</a></font></td><td><br>The clock is not gated by an external signal</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_BURST_XC0"></a><b>TC_BURST_XC0</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST_XC0">AT91C_TC_BURST_XC0</a></font></td><td><br>XC0 is ANDed with the selected clock</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_BURST_XC1"></a><b>TC_BURST_XC1</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST_XC1">AT91C_TC_BURST_XC1</a></font></td><td><br>XC1 is ANDed with the selected clock</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_BURST_XC2"></a><b>TC_BURST_XC2</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BURST_XC2">AT91C_TC_BURST_XC2</a></font></td><td><br>XC2 is ANDed with the selected clock</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6b</td><td align="CENTER"><a name="TC_CPCSTOP"></a><b>TC_CPCSTOP</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPCSTOP">AT91C_TC_CPCSTOP</a></font></td><td><b>Counter Clock Stopped with RC Compare</b><br>0 = Counter clock is not stopped when counter reaches RC.<br>1 = Counter clock is stopped when counter reaches RC.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7b</td><td align="CENTER"><a name="TC_CPCDIS"></a><b>TC_CPCDIS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPCDIS">AT91C_TC_CPCDIS</a></font></td><td><b>Counter Clock Disable with RC Compare</b><br>0 = Counter clock is not disabled when counter reaches RC.<br>1 = Counter clock is disabled when counter reaches RC.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">9..8</td><td align="CENTER"><a name="TC_EEVTEDG"></a><b>TC_EEVTEDG</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVTEDG">AT91C_TC_EEVTEDG</a></font></td><td><b>External Event Edge Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_EEVTEDG_NONE"></a><b>TC_EEVTEDG_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVTEDG_NONE">AT91C_TC_EEVTEDG_NONE</a></font></td><td><br>Edge: None</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_EEVTEDG_RISING"></a><b>TC_EEVTEDG_RISING</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVTEDG_RISING">AT91C_TC_EEVTEDG_RISING</a></font></td><td><br>Edge: rising edge</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_EEVTEDG_FALLING"></a><b>TC_EEVTEDG_FALLING</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVTEDG_FALLING">AT91C_TC_EEVTEDG_FALLING</a></font></td><td><br>Edge: falling edge</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_EEVTEDG_BOTH"></a><b>TC_EEVTEDG_BOTH</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVTEDG_BOTH">AT91C_TC_EEVTEDG_BOTH</a></font></td><td><br>Edge: each edge</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">11..10</td><td align="CENTER"><a name="TC_EEVT"></a><b>TC_EEVT</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVT">AT91C_TC_EEVT</a></font></td><td><b>External Event  Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_EEVT_TIOB"></a><b>TC_EEVT_TIOB</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVT_TIOB">AT91C_TC_EEVT_TIOB</a></font></td><td><br>Signal selected as external event: TIOB TIOB direction: input</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_EEVT_XC0"></a><b>TC_EEVT_XC0</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVT_XC0">AT91C_TC_EEVT_XC0</a></font></td><td><br>Signal selected as external event: XC0 TIOB direction: output</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_EEVT_XC1"></a><b>TC_EEVT_XC1</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVT_XC1">AT91C_TC_EEVT_XC1</a></font></td><td><br>Signal selected as external event: XC1 TIOB direction: output</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_EEVT_XC2"></a><b>TC_EEVT_XC2</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_EEVT_XC2">AT91C_TC_EEVT_XC2</a></font></td><td><br>Signal selected as external event: XC2 TIOB direction: output</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">12b</td><td align="CENTER"><a name="TC_ENETRG"></a><b>TC_ENETRG</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ENETRG">AT91C_TC_ENETRG</a></font></td><td><b>External Event Trigger enable</b><br>0 = The external event has no effect on the counter and its clock. In this case, the selected external event only controls the TIOA output.<br>1 = The external event resets the counter and starts the counter clock.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">14..13</td><td align="CENTER"><a name="TC_WAVESEL"></a><b>TC_WAVESEL</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_WAVESEL">AT91C_TC_WAVESEL</a></font></td><td><b>Waveform  Selection</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_WAVESEL_UP"></a><b>TC_WAVESEL_UP</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_WAVESEL_UP">AT91C_TC_WAVESEL_UP</a></font></td><td><br>UP mode without atomatic trigger on RC Compare</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_WAVESEL_UPDOWN"></a><b>TC_WAVESEL_UPDOWN</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_WAVESEL_UPDOWN">AT91C_TC_WAVESEL_UPDOWN</a></font></td><td><br>UPDOWN mode without automatic trigger on RC Compare</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_WAVESEL_UP_AUTO"></a><b>TC_WAVESEL_UP_AUTO</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_WAVESEL_UP_AUTO">AT91C_TC_WAVESEL_UP_AUTO</a></font></td><td><br>UP mode with automatic trigger on RC Compare</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_WAVESEL_UPDOWN_AUTO"></a><b>TC_WAVESEL_UPDOWN_AUTO</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_WAVESEL_UPDOWN_AUTO">AT91C_TC_WAVESEL_UPDOWN_AUTO</a></font></td><td><br>UPDOWN mode with automatic trigger on RC Compare</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">15b</td><td align="CENTER"><a name="TC_WAVE"></a><b>TC_WAVE</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_WAVE">AT91C_TC_WAVE</a></font></td><td><b></b><br>0 = Capture Mode is enabled.<br>1 = Capture Mode is disabled (Waveform Mode is enabled).<br>0 = Waveform Mode is disabled (Capture Mode is enabled).<br>1 = Waveform Mode is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17..16</td><td align="CENTER"><a name="TC_ACPA"></a><b>TC_ACPA</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPA">AT91C_TC_ACPA</a></font></td><td><b>RA Compare Effect on TIOA</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_ACPA_NONE"></a><b>TC_ACPA_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPA_NONE">AT91C_TC_ACPA_NONE</a></font></td><td><br>Effect: none</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_ACPA_SET"></a><b>TC_ACPA_SET</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPA_SET">AT91C_TC_ACPA_SET</a></font></td><td><br>Effect: set</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_ACPA_CLEAR"></a><b>TC_ACPA_CLEAR</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPA_CLEAR">AT91C_TC_ACPA_CLEAR</a></font></td><td><br>Effect: clear</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_ACPA_TOGGLE"></a><b>TC_ACPA_TOGGLE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPA_TOGGLE">AT91C_TC_ACPA_TOGGLE</a></font></td><td><br>Effect: toggle</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">19..18</td><td align="CENTER"><a name="TC_ACPC"></a><b>TC_ACPC</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPC">AT91C_TC_ACPC</a></font></td><td><b>RC Compare Effect on TIOA</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_ACPC_NONE"></a><b>TC_ACPC_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPC_NONE">AT91C_TC_ACPC_NONE</a></font></td><td><br>Effect: none</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_ACPC_SET"></a><b>TC_ACPC_SET</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPC_SET">AT91C_TC_ACPC_SET</a></font></td><td><br>Effect: set</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_ACPC_CLEAR"></a><b>TC_ACPC_CLEAR</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPC_CLEAR">AT91C_TC_ACPC_CLEAR</a></font></td><td><br>Effect: clear</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_ACPC_TOGGLE"></a><b>TC_ACPC_TOGGLE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ACPC_TOGGLE">AT91C_TC_ACPC_TOGGLE</a></font></td><td><br>Effect: toggle</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">21..20</td><td align="CENTER"><a name="TC_AEEVT"></a><b>TC_AEEVT</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_AEEVT">AT91C_TC_AEEVT</a></font></td><td><b>External Event Effect on TIOA</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_AEEVT_NONE"></a><b>TC_AEEVT_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_AEEVT_NONE">AT91C_TC_AEEVT_NONE</a></font></td><td><br>Effect: none</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_AEEVT_SET"></a><b>TC_AEEVT_SET</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_AEEVT_SET">AT91C_TC_AEEVT_SET</a></font></td><td><br>Effect: set</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_AEEVT_CLEAR"></a><b>TC_AEEVT_CLEAR</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_AEEVT_CLEAR">AT91C_TC_AEEVT_CLEAR</a></font></td><td><br>Effect: clear</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_AEEVT_TOGGLE"></a><b>TC_AEEVT_TOGGLE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_AEEVT_TOGGLE">AT91C_TC_AEEVT_TOGGLE</a></font></td><td><br>Effect: toggle</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">23..22</td><td align="CENTER"><a name="TC_ASWTRG"></a><b>TC_ASWTRG</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ASWTRG">AT91C_TC_ASWTRG</a></font></td><td><b>Software Trigger Effect on TIOA</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_ASWTRG_NONE"></a><b>TC_ASWTRG_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ASWTRG_NONE">AT91C_TC_ASWTRG_NONE</a></font></td><td><br>Effect: none</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_ASWTRG_SET"></a><b>TC_ASWTRG_SET</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ASWTRG_SET">AT91C_TC_ASWTRG_SET</a></font></td><td><br>Effect: set</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_ASWTRG_CLEAR"></a><b>TC_ASWTRG_CLEAR</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ASWTRG_CLEAR">AT91C_TC_ASWTRG_CLEAR</a></font></td><td><br>Effect: clear</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_ASWTRG_TOGGLE"></a><b>TC_ASWTRG_TOGGLE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ASWTRG_TOGGLE">AT91C_TC_ASWTRG_TOGGLE</a></font></td><td><br>Effect: toggle</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">25..24</td><td align="CENTER"><a name="TC_BCPB"></a><b>TC_BCPB</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPB">AT91C_TC_BCPB</a></font></td><td><b>RB Compare Effect on TIOB</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_BCPB_NONE"></a><b>TC_BCPB_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPB_NONE">AT91C_TC_BCPB_NONE</a></font></td><td><br>Effect: none</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_BCPB_SET"></a><b>TC_BCPB_SET</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPB_SET">AT91C_TC_BCPB_SET</a></font></td><td><br>Effect: set</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_BCPB_CLEAR"></a><b>TC_BCPB_CLEAR</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPB_CLEAR">AT91C_TC_BCPB_CLEAR</a></font></td><td><br>Effect: clear</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_BCPB_TOGGLE"></a><b>TC_BCPB_TOGGLE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPB_TOGGLE">AT91C_TC_BCPB_TOGGLE</a></font></td><td><br>Effect: toggle</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">27..26</td><td align="CENTER"><a name="TC_BCPC"></a><b>TC_BCPC</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPC">AT91C_TC_BCPC</a></font></td><td><b>RC Compare Effect on TIOB</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_BCPC_NONE"></a><b>TC_BCPC_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPC_NONE">AT91C_TC_BCPC_NONE</a></font></td><td><br>Effect: none</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_BCPC_SET"></a><b>TC_BCPC_SET</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPC_SET">AT91C_TC_BCPC_SET</a></font></td><td><br>Effect: set</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_BCPC_CLEAR"></a><b>TC_BCPC_CLEAR</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPC_CLEAR">AT91C_TC_BCPC_CLEAR</a></font></td><td><br>Effect: clear</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_BCPC_TOGGLE"></a><b>TC_BCPC_TOGGLE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BCPC_TOGGLE">AT91C_TC_BCPC_TOGGLE</a></font></td><td><br>Effect: toggle</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">29..28</td><td align="CENTER"><a name="TC_BEEVT"></a><b>TC_BEEVT</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BEEVT">AT91C_TC_BEEVT</a></font></td><td><b>External Event Effect on TIOB</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_BEEVT_NONE"></a><b>TC_BEEVT_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BEEVT_NONE">AT91C_TC_BEEVT_NONE</a></font></td><td><br>Effect: none</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_BEEVT_SET"></a><b>TC_BEEVT_SET</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BEEVT_SET">AT91C_TC_BEEVT_SET</a></font></td><td><br>Effect: set</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_BEEVT_CLEAR"></a><b>TC_BEEVT_CLEAR</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BEEVT_CLEAR">AT91C_TC_BEEVT_CLEAR</a></font></td><td><br>Effect: clear</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_BEEVT_TOGGLE"></a><b>TC_BEEVT_TOGGLE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BEEVT_TOGGLE">AT91C_TC_BEEVT_TOGGLE</a></font></td><td><br>Effect: toggle</td></tr>
</null></table></font>
</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">31..30</td><td align="CENTER"><a name="TC_BSWTRG"></a><b>TC_BSWTRG</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BSWTRG">AT91C_TC_BSWTRG</a></font></td><td><b>Software Trigger Effect on TIOB</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="TC_BSWTRG_NONE"></a><b>TC_BSWTRG_NONE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BSWTRG_NONE">AT91C_TC_BSWTRG_NONE</a></font></td><td><br>Effect: none</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="TC_BSWTRG_SET"></a><b>TC_BSWTRG_SET</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BSWTRG_SET">AT91C_TC_BSWTRG_SET</a></font></td><td><br>Effect: set</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="TC_BSWTRG_CLEAR"></a><b>TC_BSWTRG_CLEAR</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BSWTRG_CLEAR">AT91C_TC_BSWTRG_CLEAR</a></font></td><td><br>Effect: clear</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="TC_BSWTRG_TOGGLE"></a><b>TC_BSWTRG_TOGGLE</b><font size="-1"><br><a href="AT91SAM7S256_h.html#AT91C_TC_BSWTRG_TOGGLE">AT91C_TC_BSWTRG_TOGGLE</a></font></td><td><br>Effect: toggle</td></tr>
</null></table></font>
</td></tr>
</null></table>
<a name="TC_CV"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_CV  <i>Counter Value</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_CV">AT91C_TC0_CV</a></i> 0xFFFA0010</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_CV">AT91C_TC1_CV</a></i> 0xFFFA0050</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_CV">AT91C_TC2_CV</a></i> 0xFFFA0090</font></null></ul><br>0-65535 Counter Value contains the counter value in real time.<a name="TC_RA"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_RA  <i>Register A</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_RA">AT91C_TC0_RA</a></i> 0xFFFA0014</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_RA">AT91C_TC1_RA</a></i> 0xFFFA0054</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_RA">AT91C_TC2_RA</a></i> 0xFFFA0094</font></null></ul><br>TC Register A contains the Register A value in real time<a name="TC_RB"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_RB  <i>Register B</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_RB">AT91C_TC0_RB</a></i> 0xFFFA0018</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_RB">AT91C_TC1_RB</a></i> 0xFFFA0058</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_RB">AT91C_TC2_RB</a></i> 0xFFFA0098</font></null></ul><br>TC Register B contains the Register B value in real time<a name="TC_RC"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_RC  <i>Register C</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_RC">AT91C_TC0_RC</a></i> 0xFFFA001C</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_RC">AT91C_TC1_RC</a></i> 0xFFFA005C</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_RC">AT91C_TC2_RC</a></i> 0xFFFA009C</font></null></ul><br>TC Register C contains the Register C value in real time<a name="TC_SR"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_SR  <i>Status Register</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_SR">AT91C_TC0_SR</a></i> 0xFFFA0020</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_SR">AT91C_TC1_SR</a></i> 0xFFFA0060</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_SR">AT91C_TC2_SR</a></i> 0xFFFA00A0</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="TC_COVFS"></a><b>TC_COVFS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_COVFS">AT91C_TC_COVFS</a></font></td><td><b>Counter Overflow</b><br>0 = No counter overflow has occurred since the last read of the Status Register.<br>1 = A counter overflow has occurred since the last read of the Status Register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="TC_LOVRS"></a><b>TC_LOVRS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LOVRS">AT91C_TC_LOVRS</a></font></td><td><b>Load Overrun</b><br>0 = Load overrun has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RA or RB have been loaded at least twice without any read of the corresponding register since the last read of the Sta-tus Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="TC_CPAS"></a><b>TC_CPAS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPAS">AT91C_TC_CPAS</a></font></td><td><b>RA Compare</b><br>0 = RA Compare has not occurred since the last read of the Status Register or WAVE = 0.<br>1 = RA Compare has occurred since the last read of the Status Register, if WAVE = 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3</td><td align="CENTER"><a name="TC_CPBS"></a><b>TC_CPBS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPBS">AT91C_TC_CPBS</a></font></td><td><b>RB Compare</b><br>0 = RB Compare has not occurred since the last read of the Status Register or WAVE = 0.<br>1 = RB Compare has occurred since the last read of the Status Register, if WAVE = 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">4</td><td align="CENTER"><a name="TC_CPCS"></a><b>TC_CPCS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPCS">AT91C_TC_CPCS</a></font></td><td><b>RC Compare</b><br>0 = RC Compare has not occurred since the last read of the Status Register.<br>1 = RC Compare has occurred since the last read of the Status Register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5</td><td align="CENTER"><a name="TC_LDRAS"></a><b>TC_LDRAS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRAS">AT91C_TC_LDRAS</a></font></td><td><b>RA Loading</b><br>0 = RA Load has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RA Load has occurred since the last read of the Status Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="TC_LDRBS"></a><b>TC_LDRBS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRBS">AT91C_TC_LDRBS</a></font></td><td><b>RB Loading</b><br>0 = RB Load has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RB Load has occurred since the last read of the Status Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="TC_ETRGS"></a><b>TC_ETRGS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ETRGS">AT91C_TC_ETRGS</a></font></td><td><b>External Trigger</b><br>0 = External trigger has not occurred since the last read of the Status Register.<br>1 = External trigger has occurred since the last read of the Status Register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">16</td><td align="CENTER"><a name="TC_CLKSTA"></a><b>TC_CLKSTA</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CLKSTA">AT91C_TC_CLKSTA</a></font></td><td><b>Clock Enabling</b><br>0 = Clock is disabled.<br>1 = Clock is enabled.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17</td><td align="CENTER"><a name="TC_MTIOA"></a><b>TC_MTIOA</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_MTIOA">AT91C_TC_MTIOA</a></font></td><td><b>TIOA Mirror</b><br>0 = TIOA is low. If WAVE = 0, this means that TIOA pin is low. If WAVE = 1, this means that TIOA is driven low.<br>1 = TIOA is high. If WAVE = 0, this means that TIOA pin is high. If WAVE = 1, this means that TIOA is driven high.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">18</td><td align="CENTER"><a name="TC_MTIOB"></a><b>TC_MTIOB</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_MTIOB">AT91C_TC_MTIOB</a></font></td><td><b>TIOA Mirror</b><br>0 = TIOB is low. If WAVE = 0, this means that TIOB pin is low. If WAVE = 1, this means that TIOB is driven low.<br>1 = TIOB is high. If WAVE = 0, this means that TIOB pin is high. If WAVE = 1, this means that TIOB is driven high.</td></tr>
</null></table>
<a name="TC_IER"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_IER  <i>Interrupt Enable Register</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_IER">AT91C_TC0_IER</a></i> 0xFFFA0024</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_IER">AT91C_TC1_IER</a></i> 0xFFFA0064</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_IER">AT91C_TC2_IER</a></i> 0xFFFA00A4</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="TC_COVFS"></a><b>TC_COVFS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_COVFS">AT91C_TC_COVFS</a></font></td><td><b>Counter Overflow</b><br>0 = No counter overflow has occurred since the last read of the Status Register.<br>1 = A counter overflow has occurred since the last read of the Status Register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="TC_LOVRS"></a><b>TC_LOVRS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LOVRS">AT91C_TC_LOVRS</a></font></td><td><b>Load Overrun</b><br>0 = Load overrun has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RA or RB have been loaded at least twice without any read of the corresponding register since the last read of the Sta-tus Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="TC_CPAS"></a><b>TC_CPAS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPAS">AT91C_TC_CPAS</a></font></td><td><b>RA Compare</b><br>0 = RA Compare has not occurred since the last read of the Status Register or WAVE = 0.<br>1 = RA Compare has occurred since the last read of the Status Register, if WAVE = 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3</td><td align="CENTER"><a name="TC_CPBS"></a><b>TC_CPBS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPBS">AT91C_TC_CPBS</a></font></td><td><b>RB Compare</b><br>0 = RB Compare has not occurred since the last read of the Status Register or WAVE = 0.<br>1 = RB Compare has occurred since the last read of the Status Register, if WAVE = 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">4</td><td align="CENTER"><a name="TC_CPCS"></a><b>TC_CPCS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPCS">AT91C_TC_CPCS</a></font></td><td><b>RC Compare</b><br>0 = RC Compare has not occurred since the last read of the Status Register.<br>1 = RC Compare has occurred since the last read of the Status Register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5</td><td align="CENTER"><a name="TC_LDRAS"></a><b>TC_LDRAS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRAS">AT91C_TC_LDRAS</a></font></td><td><b>RA Loading</b><br>0 = RA Load has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RA Load has occurred since the last read of the Status Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="TC_LDRBS"></a><b>TC_LDRBS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRBS">AT91C_TC_LDRBS</a></font></td><td><b>RB Loading</b><br>0 = RB Load has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RB Load has occurred since the last read of the Status Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="TC_ETRGS"></a><b>TC_ETRGS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ETRGS">AT91C_TC_ETRGS</a></font></td><td><b>External Trigger</b><br>0 = External trigger has not occurred since the last read of the Status Register.<br>1 = External trigger has occurred since the last read of the Status Register.</td></tr>
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<a name="TC_IDR"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_IDR  <i>Interrupt Disable Register</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_IDR">AT91C_TC0_IDR</a></i> 0xFFFA0028</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_IDR">AT91C_TC1_IDR</a></i> 0xFFFA0068</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_IDR">AT91C_TC2_IDR</a></i> 0xFFFA00A8</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="TC_COVFS"></a><b>TC_COVFS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_COVFS">AT91C_TC_COVFS</a></font></td><td><b>Counter Overflow</b><br>0 = No counter overflow has occurred since the last read of the Status Register.<br>1 = A counter overflow has occurred since the last read of the Status Register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="TC_LOVRS"></a><b>TC_LOVRS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LOVRS">AT91C_TC_LOVRS</a></font></td><td><b>Load Overrun</b><br>0 = Load overrun has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RA or RB have been loaded at least twice without any read of the corresponding register since the last read of the Sta-tus Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="TC_CPAS"></a><b>TC_CPAS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPAS">AT91C_TC_CPAS</a></font></td><td><b>RA Compare</b><br>0 = RA Compare has not occurred since the last read of the Status Register or WAVE = 0.<br>1 = RA Compare has occurred since the last read of the Status Register, if WAVE = 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3</td><td align="CENTER"><a name="TC_CPBS"></a><b>TC_CPBS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPBS">AT91C_TC_CPBS</a></font></td><td><b>RB Compare</b><br>0 = RB Compare has not occurred since the last read of the Status Register or WAVE = 0.<br>1 = RB Compare has occurred since the last read of the Status Register, if WAVE = 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">4</td><td align="CENTER"><a name="TC_CPCS"></a><b>TC_CPCS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPCS">AT91C_TC_CPCS</a></font></td><td><b>RC Compare</b><br>0 = RC Compare has not occurred since the last read of the Status Register.<br>1 = RC Compare has occurred since the last read of the Status Register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5</td><td align="CENTER"><a name="TC_LDRAS"></a><b>TC_LDRAS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRAS">AT91C_TC_LDRAS</a></font></td><td><b>RA Loading</b><br>0 = RA Load has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RA Load has occurred since the last read of the Status Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="TC_LDRBS"></a><b>TC_LDRBS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRBS">AT91C_TC_LDRBS</a></font></td><td><b>RB Loading</b><br>0 = RB Load has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RB Load has occurred since the last read of the Status Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="TC_ETRGS"></a><b>TC_ETRGS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ETRGS">AT91C_TC_ETRGS</a></font></td><td><b>External Trigger</b><br>0 = External trigger has not occurred since the last read of the Status Register.<br>1 = External trigger has occurred since the last read of the Status Register.</td></tr>
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<a name="TC_IMR"></a><h4><a href="#TC">TC</a>: <i><a href="AT91SAM7S256_h.html#AT91_REG">AT91_REG</a></i> TC_IMR  <i>Interrupt Mask Register</i></h4><ul><null><font size="-2"><li><b>TC0</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC0_IMR">AT91C_TC0_IMR</a></i> 0xFFFA002C</font><font size="-2"><li><b>TC1</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC1_IMR">AT91C_TC1_IMR</a></i> 0xFFFA006C</font><font size="-2"><li><b>TC2</b> <i><a href="AT91SAM7S256_h.html#AT91C_TC2_IMR">AT91C_TC2_IMR</a></i> 0xFFFA00AC</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="TC_COVFS"></a><b>TC_COVFS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_COVFS">AT91C_TC_COVFS</a></font></td><td><b>Counter Overflow</b><br>0 = No counter overflow has occurred since the last read of the Status Register.<br>1 = A counter overflow has occurred since the last read of the Status Register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="TC_LOVRS"></a><b>TC_LOVRS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LOVRS">AT91C_TC_LOVRS</a></font></td><td><b>Load Overrun</b><br>0 = Load overrun has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RA or RB have been loaded at least twice without any read of the corresponding register since the last read of the Sta-tus Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="TC_CPAS"></a><b>TC_CPAS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPAS">AT91C_TC_CPAS</a></font></td><td><b>RA Compare</b><br>0 = RA Compare has not occurred since the last read of the Status Register or WAVE = 0.<br>1 = RA Compare has occurred since the last read of the Status Register, if WAVE = 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3</td><td align="CENTER"><a name="TC_CPBS"></a><b>TC_CPBS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPBS">AT91C_TC_CPBS</a></font></td><td><b>RB Compare</b><br>0 = RB Compare has not occurred since the last read of the Status Register or WAVE = 0.<br>1 = RB Compare has occurred since the last read of the Status Register, if WAVE = 1.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">4</td><td align="CENTER"><a name="TC_CPCS"></a><b>TC_CPCS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_CPCS">AT91C_TC_CPCS</a></font></td><td><b>RC Compare</b><br>0 = RC Compare has not occurred since the last read of the Status Register.<br>1 = RC Compare has occurred since the last read of the Status Register.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5</td><td align="CENTER"><a name="TC_LDRAS"></a><b>TC_LDRAS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRAS">AT91C_TC_LDRAS</a></font></td><td><b>RA Loading</b><br>0 = RA Load has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RA Load has occurred since the last read of the Status Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="TC_LDRBS"></a><b>TC_LDRBS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_LDRBS">AT91C_TC_LDRBS</a></font></td><td><b>RB Loading</b><br>0 = RB Load has not occurred since the last read of the Status Register or WAVE = 1.<br>1 = RB Load has occurred since the last read of the Status Register, if WAVE = 0.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="TC_ETRGS"></a><b>TC_ETRGS</b><font size="-2"><br><a href="AT91SAM7S256_h.html#AT91C_TC_ETRGS">AT91C_TC_ETRGS</a></font></td><td><b>External Trigger</b><br>0 = External trigger has not occurred since the last read of the Status Register.<br>1 = External trigger has occurred since the last read of the Status Register.</td></tr>
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